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  ? semiconductor components industries, llc, 2016 august, 2016 ? rev. 9 1 publication order number: MC10H135/d MC10H135 dual j\k master\slave flip\flop description the MC10H135 is a dual j-k master-slave flip-flop. the device is provided with an asynchronous set(s) and reset(r). these set and reset inputs overide the clock. a common clock is provided with separate j -k inputs. when the clock is static, the jk inputs do not effect the output. the output states of the flip flop change on the positive transition of the clock. features ? propagation delay, 1.5 ns typical ? power dissipation, 280 mw typical/pkg. (no load) ? f tog 250 mhz max ? improved noise margin 150 mv (over operating voltage and temperature range) ? voltage compensated ? mecl 10k ? compatible ? these devices are pb-free, halogen free and are rohs compliant www.onsemi.com *for additional marking information, refer to application note and8002/d . a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g = pb-free package marking diagrams* pdip ? 16 p suffix case 648 ? 08 16 1 16 1 MC10H135p awlyywwg pllc ? 20 fn suffix case 775 ? 02 20 1 10h135g awlyyww 120 pdip ? 16 pllc ? 20 ordering information device package shipping ? MC10H135fnr2g 500 tape & reel MC10H135fng pllc ? 20 (pb-free) 46 units / tube MC10H135pg pdip ? 16 (pb-free) 25 units / tube pllc ? 20 (pb-free) ?for information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d .
MC10H135 www.onsemi.com 2 figure 1. logic diagram figure 2. pin assignment v cc1 q1 q 1 r1 s1 k 1 j 1 v ee v cc2 q2 q 2 r2 s2 k 2 j 2 c 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 v cc1 = pin 1 v cc2 = pin 16 v ee = pin 8 s1 5 j 1 7 k 1 6 r1 4 c 9 s2 12 j 2 10 k 2 11 r2 13 q1 q 1 q2 q 2 2 3 15 14 pin assignment is for dual-in-line package. table 1. rs truth table r s q n+1 l l q n l h h h l l h h nd nd = not defined table 2. clock j-k truth table* j k q n+1 l l q n h l l l h h h h q n *output states change on positive transition of clock for j - k input condition present. table 3. maximum ratings symbol characteristic rating unit v ee power supply (v cc = 0) ? 8.0 to 0 vdc v i input voltage (v cc = 0) 0 to v ee vdc i out output current ? continuous ? surge 50 100 ma t a operating temperature range 0 to +75 c t stg storage temperature range ? plastic ? ceramic ? 55 to +150 ? 55 to +165 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected.
MC10H135 www.onsemi.com 3 table 4. electrical characteristics (v ee = ? 5.2 v 5%) (note 1) 0 25 75 symbol characteristic min max min max min max unit i e power supply current ? 75 ? 68 ? 75 ma i inh input current high pins 6, 7, 10, 11 pins 4, 5, 12, 13 pin 9 ? ? ? 460 800 675 ? ? ? 285 500 420 ? ? ? 285 500 420  a ii nl input current low 0.5 ? 0.5 ? 0.3 ?  a v oh high output voltage ? 1.02 ? 0.84 ? 0.98 ? 0.81 ? 0.92 ? 0.735 vdc v ol low output voltage ? 1.95 ? 1.63 ? 1.95 ? 1.63 ? 1.95 ? 1.60 vdc v ih high input voltage ? 1.17 ? 0.84 ? 1.13 ? 0.81 ? 1.07 ? 0.735 vdc v il low input voltage ? 1.95 ? 1.48 ? 1.95 ? 1.48 ? 1.95 ? 1.45 vdc 1. each mecl 10h ? series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. outputs are terminated through a 50  resistor to ? 2.0 v. table 5. ac characteristics 0 25 75 symbol characteristic min max min max min max unit t pd propagation delay set, reset, clock 0.7 2.6 0.7 2.6 0.7 2.6 ns t r rise time 0.7 2.2 0.7 2.2 0.7 2.2 ns t f fall time 0.7 2.2 0.7 2.2 0.7 2.2 ns t set set-up time 1.5 ? 1.5 ? 1.5 ? ns t hold hold time 1.0 ? 1.0 ? 1.0 ? ns f tog toggle frequency 250 ? 250 ? 250 ? mhz note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
MC10H135 www.onsemi.com 4 package dimensions 20 lead pllc fn suffix case 775 ? 02 issue f ? m ? ? n ? ? l ? y brk w v d d s l-m m 0.007 (0.180) n s t s l-m m 0.007 (0.180) n s t s l-m s 0.010 (0.250) n s t x g1 b u z view d ? d 20 1 s l-m m 0.007 (0.180) n s t s l-m m 0.007 (0.180) n s t s l-m s 0.010 (0.250) n s t c g view s e j r z a 0.004 (0.100) ? t ? seating plane s l-m m 0.007 (0.180) n s t s l-m m 0.007 (0.180) n s t h view s k k1 f g1 notes: 1. dimensions and tolerancing per ansi y14.5m, 1982. 2. dimensions in inches. 3. datums ? l ? , ? m ? , and ? n ? determined where top of lead shoulder exits plastic body at mold parting line. 4. dimension g1, true position to be measured at datum ? t ? , seating plane. 5. dimensions r and u do not include mold flash. allowable mold flash is 0.010 (0.250) per side. 6. dimensions in the package top may be smaller than the package bottom by up to 0.012 (0.300). dimensions r and u are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. dimension h does not include dambar protrusion or intrusion. the dambar protrusion(s) shall not cause the h dimension to be greater than 0.037 (0.940). the dambar intrusion(s) shall not cause the h dimension to be smaller than 0.025 (0.635). dim min max min max millimeters inches a 0.385 0.395 9.78 10.03 b 0.385 0.395 9.78 10.03 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.021 0.33 0.53 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 ??? 0.51 ??? k 0.025 ??? 0.64 ??? r 0.350 0.356 8.89 9.04 u 0.350 0.356 8.89 9.04 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y ??? 0.020 ??? 0.50 z 2 10 2 10 g1 0.310 0.330 7.88 8.38 k1 0.040 ??? 1.02 ??? 
MC10H135 www.onsemi.com 5 package dimensions pdip ? 16 p suffix case 648 ? 08 issue v style 1: pin 1. cathode 2. cathode 3. cathode 4. cathode 5. cathode 6. cathode 7. cathode 8. cathode 9. anode 10. anode 11. anode 12. anode 13. anode 14. anode 15. anode 16. anode style 2: pin 1. common drain 2. common drain 3. common drain 4. common drain 5. common drain 6. common drain 7. common drain 8. common drain 9. gate 10. source 11. gate 12. source 13. gate 14. source 15. gate 16. source 18 16 9 b2 note 8 d a top view e1 b b l a1 a c seating plane 0.010 ca side view m 16x d1 e a2 note 3 m b m eb e end view end view with leads constrained dim min max inches a ???? 0.210 a1 0.015 ???? b 0.014 0.022 c 0.008 0.014 d 0.735 0.775 d1 0.005 ???? e 0.100 bsc e 0.300 0.325 m ???? 10 ??? 5.33 0.38 ??? 0.35 0.56 0.20 0.36 18.67 19.69 0.13 ??? 2.54 bsc 7.62 8.26 ??? 10 min max millimeters notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. dimensions a, a1 and l are measured with the pack- age seated in jedec seating plane gauge gs ? 3. 4. dimensions d, d1 and e1 do not include mold flash or protrusions. mold flash or protrusions are not to exceed 0.10 inch. 5. dimension e is measured at a point 0.015 below datum plane h with the leads constrained perpendicular to datum c. 6. dimension eb is measured at the lead tips with the leads unconstrained. 7. datum plane h is coincident with the bottom of the leads, where the leads exit the body. 8. package contour is optional (rounded or square corners). e1 0.240 0.280 6.10 7.11 b2 eb ???? 0.430 ??? 10.92 0.060 typ 1.52 typ c a2 0.115 0.195 2.92 4.95 l 0.115 0.150 2.92 3.81 h note 5 note 6 m e/2 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 MC10H135/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative mecl is trademark of semiconductor components industries, llc (scillc) or its subsidiaries in the united states and/or other co untries.


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